Semiconductors

10 Intel engineering leaders

These ten engineering leaders hold or have held director-level and higher engineering roles at Intel, with titles such as director of engineering and senior director of engineering. A reader can learn how Intel organizes engineering work across chip design, process technology, platform hardware, AI and software.

10 professionals1 companiesData retrieved September 28, 2026

Professionals to explore

01—10
  1. Joe Murphy

    LinkedIn

    Experience: Sr. Engineering Director, Cloud Platform Group, Data Center Group · Intel

    Former Sr. Engineering Director, Cloud Platform Group, Data Center Group at Intel (2012–2024); his profile says he was responsible for server chipset development as well as work on SOC Micro Servers, Crystal Ridge Optane and Royal core. He was also Director of Engineering at Intel (1994–2009) and VP of Engineering at LSI, an Avago Technologies Company (2009–2011).

  2. John Wong

    LinkedIn

    Experience: Senior Director of Engineering · Intel

    Senior Director of Engineering at Intel since 2021, following Senior Director of Hardware Engineering (2018–2021), Director of 5G Wireless Software Engineering (2015–2018) and Director of Engineering, Advanced Wireless Performance & Technology (2013–2015) at Intel. His profile describes leading and delivering commercial silicon, platform hardware and software, including digital, mixed-signal and analog technology IPs.

  3. Kailash Khairnar

    LinkedIn

    Experience: Senior Director of Engineering, NPU, Client AI · Intel

    Senior Director of Engineering, NPU, Client AI at Intel since February 2026, following Director Of Engineering, NPU, Client AI (2022–2026) and Engineering Manager, NPU, Client AI (2017–2022). His profile describes leading the SD team designing integrated NPU IP for Intel client SoCs.

  4. Kathiravan D

    LinkedIn

    Experience: Senior Director - Silicon & Platform Engineering (Client, Data Center, AI & Edge) · Intel

    Senior Director - Silicon & Platform Engineering (Client, Data Center, AI & Edge) at Intel since 2025. His earlier Intel roles were Director - Hardware Systems Engineering (Client, DCAI and Edge Computing) (2023–2025), Director - Thermal Mechanical and Systems Engineering (Client Computing) (2020–2022) and Senior Manager -Thermal and Mechanical Engineering (2016–2020).

  5. Manmeet Singh Meet

    LinkedIn

    Experience: Sr. Engineering Director - Server Engineering Group · Intel

    Former Sr. Engineering Director - Server Engineering Group at Intel (2024–2026) and Engineering Director at Xeon Engineering Group at Intel (2020–2024); his profile headline also lists Centre Head, Intel Boxborough MA. He was Sr. Engineering Manager (DFT) at Xeon and networking engineering group at Intel from 2017 to 2020.

  6. Nofil Fawad

    LinkedIn

    Experience: Senior Director Engineering Connected Vehicle SaaS · Intel

    Senior Director Engineering Connected Vehicle SaaS at Intel since 2022; his profile says he is responsible for the connected vehicle solution design, architecture and product definition. His earlier Intel roles include Director of Cloud Engineering and Chief Architect - Intel Incubation Ventures (2020–2022) and Director Of Engineering and CTO Autonomous Driving Group (2016–2018).

  7. Ramesh Devarajan

    LinkedIn

    Experience: Senior Director of Engineering · Intel

    Senior Director of Engineering at Intel since 2022, after Director of Engineering there from 2013 to 2022. His profile says he leads a worldwide team responsible for Architecture Modeling and Tracing Solutions, delivering simulation and tracing tools and technologies used for end-to-end workload analysis.

  8. Satya Vishwanathan

    LinkedIn

    Experience: Director of Engineering - Product Development Solutions Group · Intel

    Director of Engineering - Product Development Solutions Group at Intel since 2013; his profile headline gives his title as Senior Director of Engineering at Intel Corporation. The profile describes experience leading SoC design systems, SoC and IP pre-silicon design, and design automation tools, flows and methods, and building cross-site teams.

  9. Sharath Hegde

    LinkedIn

    Experience: Senior Director of Engineering, Sr. Principal Engineer · Intel

    Senior Director of Engineering, Sr. Principal Engineer at Intel since 2024, after Director of Engineering, Principal Engineer (2018–2024) and Technology Development Engineering Manager (2014–2018) at Intel. His profile describes delivering semiconductor process technologies across the full lifecycle, from early development to high-volume manufacturing (HVM) transfer and sustaining.

  10. Udayan Bhattacharyya

    LinkedIn

    Experience: Director of Engineering, Intel Foundry Services · Intel

    Director of Engineering, Intel Foundry Services at Intel since 2011; his profile says he owns the IFS team's chip integration and physical design activities, IP execution and delivery, and reference flow ownership, and led multiple physical design and integration teams in earlier roles. He was Senior Engineering Manager at Arm (2008–2011) and Lead Engineer at Intel (2003–2008).

Choose the right perspective

Pick the person whose engineering area matches your question, since process technology, SoC and IP design, platform hardware and software products follow different development cycles. Check whether the relevant Intel role is current before asking about present-day roadmaps or organization.

Questions to take into the conversation

  1. 01How are large silicon or platform programs staffed and coordinated across sites and teams in your area?
  2. 02What does the path from early development to high-volume production or product launch look like, and where do schedules usually slip?
  3. 03How do you balance design reuse, tools and methodology investments against the need to deliver the current product on time?

About this directory

This is a professional research starting point based on business profile data retrieved on . Titles and companies reflect that source snapshot and may describe past or present roles. Check the linked profiles for current details. Inclusion does not imply Instant Expert membership or availability.

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