Semiconductors
10 NVIDIA hardware engineers
These ten current NVIDIA hardware engineers hold senior hardware engineering roles at NVIDIA, with work that includes mixed-signal IP, physical design methodology, GPU clocks verification, HBM signal and power integrity, silicon power modeling and GPU thermal design. A reader can learn what hardware engineer work at NVIDIA involves from people who have done it.
Professionals to explore
01—10Aditya Channamallu
LinkedInExperience: Senior Hardware Design Engineer · NVIDIA
Senior Hardware Design Engineer at NVIDIA since 2024, supporting system-level integration and validation of NVIDIA's Blackwell and Rubin GPU platforms for high-performance servers, per the profile. Former Staff Product Design Engineer at WD (2021–2024) and Hardware System Engineer at Supermicro (2019–2021).
Arun Suresh
LinkedInExperience: Senior Hardware Engineering Manager · NVIDIA
Senior Hardware Engineering Manager at NVIDIA since 2022, based in Bengaluru. Arun Suresh is also listed as Hardware Engineering Manager (2018–2023) and Senior ASIC Engineer (2016–2018) at NVIDIA, and was Senior Hardware Design Engineer at Imagination Technologies (2015–2016).
Ashok Srinivasan
LinkedInExperience: Senior Hardware Engineer - Autonomous Vehicle Safety · NVIDIA
Senior Hardware Engineer - Autonomous Vehicle Safety at NVIDIA since 2015. Ashok Srinivasan was also Senior Hardware Architect - Autonomous Vehicle Safety and Senior Safety Architect - Hardware at NVIDIA (2018–2024), Sr. System Architect (2010–2015) and Member, Technical Staff (2001–2010) at NVIDIA.
Guangqi Wang
LinkedInExperience: Senior Hardware Engineer · NVIDIA
Senior Hardware Engineer at NVIDIA since 2015, based in Shanghai, working as GPU Thermal Solution Lead Engineer responsible for GPU temperature control device design, customization and validation, per the profile. Former Senior BB Engineer at Icera Semiconductor Inc (2009–2011).
Jinwook Jung
LinkedInExperience: Senior Hardware Engineer · NVIDIA
Senior Hardware Engineer at NVIDIA since 2025, based in Santa Clara and working on physical design methodology development, per the profile. Former Senior Research Scientist (2023–2025) and Staff Research Scientist (2023) at IBM, and Postdoctoral Researcher at Korea Advanced Institute of Science and Technology (2018).
M. Y-Kao
LinkedInExperience: Senior Hardware Engineer · NVIDIA
Senior Hardware Engineer at NVIDIA in Taipei since 2025, after a Senior Hardware Engineer role at NVIDIA in Santa Clara (2022–2025) that the profile ties to ASIC physical design methodology. M. Y-Kao was also a VLSI CAD Intern at NVIDIA (2021) and a doctoral student researcher at the University of California, Berkeley (2017–2022).
Naresh Kamath
LinkedInExperience: Senior Hardware Engineer · NVIDIA
Senior Hardware Engineer at NVIDIA since 2013, with the profile listing SOC emulation, GPU clocks verification for functional and DFT architectures, and clocks emulation and bring-up. Naresh Kamath was previously a Hardware Intern at NVIDIA (2013) and a Project Engineer at Wipro (2010–2011).
Nikhil Sharma
LinkedInExperience: Senior Hardware Engineer · NVIDIA
Senior Hardware Engineer at NVIDIA since 2024, based in Bengaluru, working in NVIDIA's Silicon Co-Design Group on silicon power characterization and modelling across laptop, desktop and automotive product segments, per the profile. Former Senior Engineer – SoC Resource Manager Validation at Qualcomm (2022–2024).
Shi Wenjun
LinkedInExperience: Sr. Hardware engineer · NVIDIA
Sr. Hardware engineer at NVIDIA since 2010, where Shi Wenjun says they lead NVIDIA's HBM interface SI/PI design work and describes expertise in DDR and HBM memory interface planning and signal and power integrity analysis. Former SI PI Team Lead at BlackBerry (2009–2010) and Senior Analog Engineer at Intel (2006–2009).
Steven(Zhe) Liu
LinkedInExperience: Senior Hardware Engineer · NVIDIA
Senior Hardware Engineer at NVIDIA since 2014, modeling, verifying and integrating mixed-signal and full-custom-designed IPs for all chip projects at NVIDIA, per the profile. Steven(Zhe) Liu was previously ASIC Design Engineer at NVIDIA (2012–2014), with the current role listed in Santa Clara.
Choose the right perspective
Pick the engineer whose layer of hardware matches your question, since chip physical design, verification, memory interfaces, thermal design and system validation call for different skills. Check location and tenure, since teams in different countries and long-tenured engineers have seen different product generations.
Questions to take into the conversation
- 01How do hardware teams verify clocking and power behavior before a GPU tapes out?
- 02What are the main signal and power integrity challenges with high-bandwidth memory interfaces?
- 03How do system engineers validate new GPU platforms for large server deployments?
Reaching NVIDIA hardware engineers
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About this directory
This is a professional research starting point based on business profile data retrieved on . Titles and companies reflect that source snapshot; roles marked former had ended by then. Check the linked profiles for current details. Inclusion does not imply Instant Expert membership or availability.
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